DuBroff, “Power-bus decoupling with embedded capacitance in printed circuit board design

Abstract—This paper experimentally investigates the effective-ness of embedded capacitance for reducing power-bus noise in high-speed printed circuit board designs. Boards with embedded capacitance employ closely spaced power-return plane pairs separated by a thin layer of dielectric material. In this paper, test boards with four embedded capacitance materials are evaluated. Power-bus input impedance measurements and power-bus noise measurements are presented for boards with various dimensions and layer stack ups. Unlike discrete decoupling capacitors, whose effective frequency range is generally limited to a few hundred megahertz due to interconnect inductance, embedded capacitance was found to efficiently reduce power-bus noise over the entire frequency range evaluated (up to 5 GHz). Index Terms—Conduction loss, decoupling capacitor, embedded capacitance (buried capacitance), power-bus decoupling, power-bus impedance, power-bus noise (delta-I noise, ground bounce noise, simultaneous switch noise), power plane, return plane. I